介绍一种用于微处理器系统的高性能背板总线。这种并行总线支持32位非多路复用地址和数据高速公路上的单块和块传输周期。传输由异步握手协议控制。总线分配提供了多处理器体系结构。该总线还支持模块间中断，以促进对内部和外部事件的快速响应。电路板和机箱的结构基于IEC 60297。 注:1。该总线与VME总线类似。 2.关于本出版物的价格，请参考ISO/IEC价格代码表。

Describes a high-performance backplane bus for use in microprocessor bases systems. This parallel bus supports single- and block-transfer cycles on a 32-bit non-multiplexed address and data highway. Transmission is governed by an asynchronous handshaken protocol. The bus allocation provides for multiprocessor architectures. This bus also supports inter-module interrupts for facilitating quick response to internal and external events. The mechanics of the boards and chassis are based on IEC 60297. Note: -1.This bus is similar to the VME bus. 2.For the price of this publication, please consult the ISO/IEC price-code list.