首页 馆藏资源 舆情信息 标准服务 科研活动 关于我们
现行 IEEE 1296-1987
到馆提醒
收藏跟踪
购买正版
IEEE Standard for a High-Performance Synchronous 32-Bit Bus: MULTIBUS II 高性能同步32位总线的IEEE标准:MULTIBUS II
发布日期: 1988-08-03
本文件定义了IEEE 1296总线标准的操作、功能和属性。 (1) 本标准定义了高性能32位同步总线标准。 (2) 总线标准的设计寿命必须为10年,具有向后兼容性。 (3) 该标准适用于优化数据块传输的通用应用,包括消息传递协议。对于实时应用程序,总线将提供一种确保消息传递时间上限的方法。 (4) 该标准旨在与现有的IEC[I]、[2]、[3]机械标准兼容,同时认识到需要特殊的前面板来满足ESD、EMI和RFI要求。 (5) 标准中的选项将明确确定。 (6) 该标准旨在支持功能分区配置中的多个处理器模块以及同一系统中的异构处理器类型。 (7) 该标准旨在支持同一系统中的异构处理器类型。 (8) 消息传递格式和协议用于将来迁移到串行系统总线。
This document defines the operation, functions, and attributes of the IEEE 1296 bus standard. (1) This standard defines a high-performance 32-bit synchronous bus standard. (2) The bus standard must have a design-in lifetime of 10 years with backward compatibility. (3) The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time. (4) The standard is intended to be compatible with existing IEC [I], [2], [3] mechanical standards with recognition of the need for special front panels to address ESD, EMI, and RFI requirements. (5) Options within the standard will be clearly identified. (6) The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system. (7) The standard is intended to support heterogeneous processor types in the same system. (8) Message passing format and protocol is intended for future migration to a serial system bus.
分类信息
关联关系
研制信息
相似标准/计划/法规