本标准定义了一种混合信号测试总线结构，该结构提供了对模拟和数字测试信号的控制和访问方式，从而有效地扩展了IEEE Std 1149.1-2001中描述的数字电路的可测试性结构，为混合信号电路提供了类似的设施。除了IEEE Std 1149.1-2001中常规意义上的互连测试外，本标准定义的混合信号测试总线还提供了参数测试方法，以及访问内部测试结构的方法（可选）。本标准没有规定测试电路的实施细节，尽管给出了符合性实施的示例以供说明。此外，该标准还对边界进行了扩展- 扫描描述语言（BSDL），用于描述特定组件中本标准实施的关键方面。目前，本标准定义的BSDL扩展明确省略了本标准定义的任何和所有模拟参数的描述。

This standard defines a mixed-signal test bus architecture that provides the means of control and access to both analog and digital test signals such that the testability structure for digital circuits described in IEEE Std 1149.1-2001 has been extended effectively to provide similar facilities for mixed-signal circuits. In addition to testing of interconnections in the conventional sense of IEEE Std 1149.1-2001, the mixed-signal test bus defined by this standard also provides the means for parametric testing and, optionally, the means to access internal test structures. The standard does not mandate implementation details of the test circuitry, although examples of conformant implementations are given for illustration. Further, the standard develops extensions to Boundary-Scan Description Language (BSDL) as a means of describing key aspects of the implementation of this standard within a particular component. At present, the extensions to BSDL defined by this standard specifically omit the description of any and all analog parameters defined by the standard.