RapidIO体系结构的开发是为了满足作为开放标准在各种应用中使用的高性能低引脚数分组交换系统级互连的需求。该体系结构面向网络、电信和高性能嵌入式应用。它主要用作系统内接口，允许芯片间和板间通信以每秒千兆字节的性能水平进行。它提供了丰富的功能，包括高数据带宽、低延迟能力和对高性能I/O设备的支持，以及提供全球共享内存、消息传递和软件管理编程模型。

The RapidIO architecture was developed to address the need for a high-performance low pin count packet-switched system level interconnect to be used in a variety of applications as an open standard. The architecture is targeted toward networking, telecom, and high performance embedded applications. It is intended primarily as an intra-system interface, allowing chip-to-chip and board-toboard communications at Gigabyte per second performance levels. It provides a rich variety of features including high data bandwidth, low-latency capability and support for high-performance I/O devices, as well as providing globally shared memory, message passing, and software managed programming models.