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Design Guide for High-Speed Controlled Impedance Circuit Boards 高速控制阻抗电路板设计指南
发布日期: 2004-03-01
受控阻抗是指在用于连接电路上不同设备的互连线(传输线)的特性阻抗中保持一定的公差。受控阻抗通常是高速数字或高频模拟电路的设计考虑因素。本指南适用于电路设计师、包装工程师、印制板制造商和采购人员。修订版A中的改进包括逻辑系列的扩展数据、不平衡线的更新方程式、平衡线配置的新方程式,以及电容线和传输线之间的详细比较,包括传输线内的传播。
Controlled impedance is the maintenance of some specified tolerance in the characteristic impedance of an interconnect line (transmission line) that is used to connect different devices on a circuit. Controlled impedance is often a design consideration for high-speed digital or high-frequency analog circuits. This guide is intended to be used by circuit designers, packaging engineers, printed board fabricators, and procurement personnel. Enhancements within Revision A include expanded data for logic families, updated equations for unbalanced lines, new equations for balanced line configurations, and detailed comparisons between capacitive lines and transmission lines, including propagation within transmission lines.
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