This standard defines an interfacing system used to interconnect data processing, data storage, and peripheral control devices in a tightly coupled hardware configuration. The system has the following objectives: 1) To allow communication between devices on the bus without disturbing the internal activities of other devices interfaced to the bus. 2) To specify the electrical and mechanical system characteristics required to design devices that will reliably and unambiguously communicate with other devices interfaced to the bus. 3) To specify protocols that precisely define the interaction between the bus and devices interfaced to it. 4) To provide terminology and definitions that describe system protocols. 5) To allow a broad range of design latitude so that the designer can optimize cost or performance, or both, without affecting the system compatibility. 6) To provide a system where performance is primarily device limited, rather than system interface limited.