BS IEC 63011-1:2018提供了与多芯片集成电路相关的定义，如 使用硅通孔（TSV）或微凸块垂直堆叠的模具。条款和 还介绍了与多芯片集成电路的制造和测试有关的定义 假如交叉引用:IEC 60050-411:1996IEC 60050-161:1990IEC 60050-131:2002IEC 60050-713IEC 63011-2IEC 63011-3IEC 60050-714购买本文件时可用的所有现行修订版均包含在购买本文件中。

BS IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.Cross References:IEC 60050-411:1996IEC 60050-161:1990IEC 60050-131:2002IEC 60050-713IEC 63011-2IEC 63011-3IEC 60050-714All current amendments available at time of purchase are included with the purchase of this document.