本程序描述了使用矢量网络分析仪测量带有SSTL（存根串联端接逻辑）接口引脚的设备引脚电容的推荐方法。本标准程序的一个目的是将冗长且往往不准确的脚注（通常在针寄生菌规范中找到）简化为对本文件的简单引用。在特殊情况下，修改语句可能会根据特定组件的特殊需要调整此程序。

This procedure describes a recommended way to measure pin capacitance of devices with SSTL (Stub Series Terminated Logic) interface pins by use of a Vector Network Analyzer. One purpose of this standard procedure is to reduce the lengthy and often inaccurate footnote - usually found around the specification of pin parasitics - to a simple reference to this document. In special cases modifying statements may adjust this procedure to the special needs of certain component.