Draft Document - Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ) (IEC 47D/732/CD:2008)
文件草案.半导体器件的机械标准化.第6-20部分:表面安装半导体器件封装外形图绘制的一般规则.小外形J引线封装(SOJ)的封装尺寸测量方法(IEC 47D/732/CD:2008)